The development of DRAM capacitors has progressed significantly, with the evolution from poly-Si to TiN electrodes and from SiO2 to ZrO2-based multilayers for dielectrics. This has helped suppress the formation of low-k layers at the electrode/dielectric interface. However, as devices have become smaller, the thickness of the dielectric film has been reduced to a few nanometers, and the ultra-thin TiOxNy formed at the current ZrO2/TiN interface has also impacted the reduction of effective permittivity. Various treatments and additional layer interposition are being used to reduce the thickness of the low-k layer, but these approaches do not completely solve the fundamental problem.
Improving the interfacial properties of MIMs is a major topic for the development of next-generation capacitors unless the conventional structure of current DRAM capacitors with a pillar structure is transformed. An electrode/dielectric combination that does not form a deleterious interfacial layer that leads to capacitance degradation is essential. The formation of defects that can increase leakage current must be minimized through an ideal sharp interface. Moreover, when the dielectric is composed of multilayers, controlling the interface properties between the insulating layers for better dielectric properties is also crucial. In this talk, the atomic layer deposition of TiO2 and SrTiO3, which are promising candidates for future dielectrics, and the improvement of their interface properties would be discussed.